The present invention is related to operational amplifier technology. More particularly, the present invention is related to an amplifier that includes a cascode stage exhibiting properties of high DC gain and low thermal noise.
An integrated amplifier circuit such as an operational amplifier (op-amp) is usually constructed as an integrated circuit. The operational amplifier includes an array of active and/or passive components that are connected together to form a functioning circuit. Typically, input signals are provided to the integrated amplifier circuit via selected input pins. The operational amplifier typically includes multiple-stages such as an input stage, and an output stage.
An input stage for a conventional CMOS folded cascode operational amplifier (100) is illustrated in FIG. 1. Input stage 100 includes metal oxide semiconductor (MOS) transistors M101-M106, and current sources I101-I103. Transistor M101 has a source that is coupled to node N103, a gate that is coupled to input terminal INM, and a drain that is coupled to node N101. Transistor M102 has a source that is coupled to node N103, a gate that is coupled to input terminal INP, and a drain that is coupled to node N102. Transistor M103 has a source that is coupled to node N101, a gate that is coupled to bias voltage V101, and a drain that is coupled to node N105. Transistor M104 has a source that is coupled to node N102, a gate that is coupled to bias voltage V101, and a drain that is coupled to node N104. Transistor M105 has a source that is coupled to power supply VDD, a gate that is coupled to node N105, and a drain that is coupled to node N105. Transistor M106 has a source that is coupled to power supply VDD, a gate that is coupled to node N105, and a drain that is coupled to node N104. Current source 1101 is coupled between VDD and node N103. Current source 1102 is coupled between node N102 and VSS. Current source I103 is coupled between node N101 and VSS.
Transistors M101 and M102 cooperate with current source I101 to operate as a differential pair circuit in the input stage. The differential pair circuit is responsive to a differential signal that is applied across the INP and INM input terminals. Transistors M103-M106 and current sources I102-I103 are arranged to operate as a cascode circuit in the input stage. Node N104 is a high impedance node that drives additional stages (not shown) in the amplifier circuit. The differential pair and the cascode stage cooperate with one another to provide gain in response to the input signals based on their difference. The output of the cascode stage corresponds to node N104, which may be used to drive another stage of the amplifier.
Briefly stated, a cascode stage in the present invention includes a gain boost circuit arrangement in a folded cascode type of operational amplifier. The gain boost circuit arrangement improves the overall DC gain of the operational amplifier while maintaining good low noise performance with the resistive loads. The cascode stage includes a current mirror circuit, resistive loads, and a regulated (or gain boosted) cascode circuit. The resistive loads are arranged to minimize thermal noise, while the regulated cascode circuit is arranged to increase the output impedance of a current mirror. The increased output impedance results in higher DC gain in the operational amplifier. The increased DC gain and low noise characteristics may be implemented in bipolar and FET technologies.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detailed description of illustrative embodiments of the invention, and to the appended claims.